DATE
2007
IEEE
14 years 6 months ago
2007
IEEE
The majority of current Network on Chip (NoC) architectures employ mesh topology and use simple static routing, to reduce power and area. However, regular mesh topology is unreali...
DATE
2007
IEEE
14 years 6 months ago
2007
IEEE
This paper presents a new blocking logic to block unknowns for temporal compactors. The proposed blocking logic can reduce data volume required to control the blocking logic and a...
DATE
2007
IEEE
14 years 6 months ago
2007
IEEE
DATE
2007
IEEE
14 years 6 months ago
2007
IEEE
Solid frameworks and toolkits for design and analysis of embedded systems are of high importance, since they enable early reasoning about critical properties of a system. This pap...
DATE
2007
IEEE
14 years 6 months ago
2007
IEEE
This paper proposes an efficient test methodology to test switches in a Network-on-Chip (NoC) architecture. A switch in an NoC consists of a number of ports and a router. Using th...
DATE
2007
IEEE
14 years 6 months ago
2007
IEEE
Scan chain defect diagnosis is important to silicon debug and yield enhancement. Traditional simulationbased chain diagnosis algorithms may take long run time if a large number of...
DATE
2007
IEEE
14 years 6 months ago
2007
IEEE
We propose in this paper an algorithm for off-line selection of the contents of on-chip memories. The algorithm supports two types of on-chip memories, namely locked caches and sc...
DATE
2007
IEEE
14 years 6 months ago
2007
IEEE
- This paper introduces an innovative design which implements a high-performance JPEG-LS encoder. The encoding process follows the principles of the JPEG-LS lossless mode. The prop...
DATE
2007
IEEE
14 years 6 months ago
2007
IEEE
This paper focuses on enhancing performance of cycle accurate simulation with multiple processor simulators. Simulation performance is determined by how often simulators exchange ...
DATE
2007
IEEE
14 years 6 months ago
2007
IEEE
Device scaling in new and future technologies brings along severe increase in the soft error rate of circuits, for combinational and sequential logic. Although potential solutions...