Sciweavers

DAC
2006
ACM
15 years 14 days ago
Design tools for reliability analysis
Recent progress in EDA tools allows IC designs to be accurately verified with consequent improvements in yield and performance through reduced guard bands. This paper will present...
Zhihong Liu, Bruce McGaughy, James Z. Ma
DAC
2006
ACM
15 years 14 days ago
An efficient retiming algorithm under setup and hold constraints
In this paper we present a new efficient algorithm for retiming sequential circuits with edge-triggered registers under both setup and hold constraints. Compared with the previous...
Chuan Lin, Hai Zhou
DAC
2006
ACM
15 years 14 days ago
Optimal simultaneous mapping and clustering for FPGA delay optimization
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
Joey Y. Lin, Deming Chen, Jason Cong
DAC
2006
ACM
15 years 14 days ago
A new LP based incremental timing driven placement for high performance designs
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
Tao Luo, David Newmark, David Z. Pan
DAC
2006
ACM
15 years 14 days ago
Design space exploration and prototyping for on-chip multimedia applications
Ümit Y. Ogras, Hyung Gyu Lee, Naehyuck Chang,...
DAC
2006
ACM
15 years 14 days ago
HybDTM: a coordinated hardware-software approach for dynamic thermal management
With ever-increasing power density and cooling costs in modern high-performance systems, dynamic thermal management (DTM) has emerged as an effective technique for guaranteeing th...
Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K....
DAC
2006
ACM
15 years 14 days ago
GreenBus: a generic interconnect fabric for transaction level modelling
In this paper we present a generic interconnect fabric for transaction level modelling tackeling three major aspects. First, a review of the bus and IO structures that we have ana...
Wolfgang Klingauf, Robert Günzel, Oliver Brin...
DAC
2006
ACM
15 years 14 days ago
Subthreshold logical effort: a systematic framework for optimal subthreshold device sizing
Subthreshold circuit designs have been demonstrated to be a successful alternative when ultra-low power consumption is paramount. However, the characteristics of MOS transistors i...
John Keane, Hanyong Eom, Tae-Hyoung Kim, Sachin S....
DAC
2006
ACM
15 years 14 days ago
Harvesting aware power management for sensor networks
Energy harvesting offers a promising alternative to solve the sustainability limitations arising from battery size constraints in sensor networks. Several considerations in using ...
Aman Kansal, Jason Hsu, Mani B. Srivastava, Vijay ...
DAC
2006
ACM
15 years 14 days ago
An automated, reconfigurable, low-power RFID tag
This paper describes an ultra low power active RFID tag and its automated design flow. RFID primitives to be supported by the tag are enumerated with RFID macros and the behavior ...
Alex K. Jones, Raymond R. Hoare, Swapna R. Donthar...