Sciweavers

DAC
2007
ACM
15 years 16 days ago
Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
DAC
2007
ACM
15 years 16 days ago
The KILL Rule for Multicore
Multicore has shown significant performance and power advantages over single cores in commercial systems with a 2-4 cores. Applying a corollary of Moore's Law for multicore, ...
Anant Agarwal, Markus Levy
DAC
2007
ACM
15 years 16 days ago
Progressive Decomposition: A Heuristic to Structure Arithmetic Circuits
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open problem and largely unsolved. In mos...
Ajay K. Verma, Philip Brisk, Paolo Ienne
DAC
2007
ACM
15 years 16 days ago
Efficient Computation of Buffer Capacities for Cyclo-Static Dataflow Graphs
A key step in the design of cyclo-static real-time systems is the determination of buffer capacities. In our multi-processor system, we apply back-pressure, which means that tasks...
Maarten Wiggers, Marco Bekooij, Gerard J. M. Smit
DAC
2007
ACM
15 years 16 days ago
Scan Test Planning for Power Reduction
Many STUMPS architectures found in current chip designs allow disabling of individual scan chains for debug and diagnosis. In a recent paper it has been shown that this feature can...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...
DAC
2007
ACM
15 years 16 days ago
IPR: An Integrated Placement and Routing Algorithm
Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
Min Pan, Chris C. N. Chu
DAC
2007
ACM
15 years 16 days ago
Optimal Selection of Voltage Regulator Modules in a Power Delivery Network
High efficiency low voltage DC-DC conversion is a key enabler to the design of power-efficient integrated circuits. Typically a star configuration of the DC-DC converters, where o...
Behnam Amelifard, Massoud Pedram
DAC
2007
ACM
15 years 16 days ago
Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage
In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent ...
Tao Li, Zhiping Yu
DAC
2008
ACM
15 years 16 days ago
Faster symmetry discovery using sparsity of symmetries
Many computational tools have recently begun to benefit from the use of the symmetry inherent in the tasks they solve, and use general-purpose graph symmetry tools to uncover this...
Paul T. Darga, Karem A. Sakallah, Igor L. Markov