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FPL
2001
Springer
96views Hardware» more  FPL 2001»
14 years 5 months ago
System Level Tools for DSP in FPGAs
Abstract. Visual data ow environments are ideally suited for modeling digital signal processing (DSP) systems, as many DSP algorithms are most naturally speci ed by signal ow gra...
James Hwang, Brent Milne, Nabeel Shirazi, Jeffrey ...
FPL
2001
Springer
142views Hardware» more  FPL 2001»
14 years 5 months ago
Gigahertz Reconfigurable Computing Using SiGe HBT BiCMOS FPGAs
Field programmable gate arrays (FPGAs) are flexible programmable devices that are used in a wide variety of applications such as network routing, signal processing, pattern recogni...
Bryan S. Goda, Russell P. Kraft, Steven R. Carloug...
FPL
2001
Springer
102views Hardware» more  FPL 2001»
14 years 5 months ago
Technology Trends and Adaptive Computing
System and processor architectures depend on changes in technology. Looking ahead as die density and speed increase, power consumption and on chip interconnection delay become incr...
Michael J. Flynn, Albert A. Liddicoat
FPL
2001
Springer
78views Hardware» more  FPL 2001»
14 years 5 months ago
Run-Time Performance Optimization of an FPGA-Based Deduction Engine for SAT Solvers
Andreas Dandalis, Viktor K. Prasanna, Bharani Thir...
FPL
2001
Springer
130views Hardware» more  FPL 2001»
14 years 5 months ago
FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits
Designers of safety-critical VLSI systems are asking for effective tools for evaluating and validating their designs. Fault Injection is commonly adopted for this task, and its eff...
Pierluigi Civera, Luca Macchiarulo, Maurizio Rebau...
FPL
2001
Springer
101views Hardware» more  FPL 2001»
14 years 5 months ago
An FPGA-Based Syntactic Parser for Real-Life Almost Unrestricted Context-Free Grammars
This paper presents an FPGA-based implementation of a syntactic parser that can process languages generated by almost unrestricted real-life context-free grammars (CFGs). More prec...
Cristian Ciressan, Eduardo Sanchez, Martin Rajman,...
FPL
2001
Springer
123views Hardware» more  FPL 2001»
14 years 5 months ago
Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines
This paper presents new achievements on the automatic mapping of algorithms, written in imperative software programming languages, to custom computing machines. The reconfigurable ...
João M. P. Cardoso, Horácio C. Neto
FPL
2001
Springer
77views Hardware» more  FPL 2001»
14 years 5 months ago
Implementation of (Normalised) RLS Lattice on Virtex
We present an implementation of a complete RLS Lattice and Normalised RLS Lattice cores for Virtex. The cores accept 24-bit fixed point inputs and produce 24-bit fixed point predic...
Felix Albu, Jiri Kadlec, Christopher I. Softley, R...