DATE
2009
IEEE
14 years 8 months ago
2009
IEEE
The automated design of SoCs from pre-selected IPs that may require different clocks is challenging because of the following issues. Firstly, protocol mismatches between IPs need ...
DATE
2009
IEEE
14 years 8 months ago
2009
IEEE
DATE
2009
IEEE
14 years 8 months ago
2009
IEEE
—Intensive research is performed to find post-CMOS technologies. A very promising direction based on reversible logic are quantum computers. While in the domain of reversible lo...
DATE
2009
IEEE
14 years 8 months ago
2009
IEEE
—Negative Bias Temperature Instability (NBTI) is a significant reliability concern for nanoscale CMOS circuits. Its effects on circuit timing can be especially pronounced for ci...
DATE
2009
IEEE
14 years 8 months ago
2009
IEEE
Abstract— This paper presents a six-transistor (6T) singleended static random access memory (SE-SRAM) bitcell with an isolated read-port, suitable for low-Î and low-power embedd...
DATE
2009
IEEE
14 years 8 months ago
2009
IEEE
NAND Flash Memories require Garbage Collection (GC) and Wear Leveling (WL) operations to be carried out by Flash Translation Layers (FTLs) that oversee flash management. Owing to ...
DATE
2009
IEEE
14 years 8 months ago
2009
IEEE
Abstract—Complex software programs are mostly characterized by phase behavior and runtime distributions. Due to the dynamism of the two characteristics, it is not efficient to m...
DATE
2009
IEEE
14 years 8 months ago
2009
IEEE
—In modern sub-micron design, achieving low-skew clock distributions is facing challenges for high-performance circuits. Symmetric global clock distribution and clock tree synthe...
DATE
2009
IEEE
14 years 8 months ago
2009
IEEE
Abstract—Longer range, faster speed and stronger link are today’s wireless mandatory characteristics. Tremendous efforts are being deployed to create new and improved wireless ...
DATE
2009
IEEE
14 years 8 months ago
2009
IEEE
