Sciweavers

DATE
2009
IEEE
119views Hardware» more  DATE 2009»
14 years 3 months ago
Improved worst-case response-time calculations by upper-bound conditions
Fast real-time feasibility tests and analysis algorithms are necessary for a high acceptance of the formal techniques by industrial software engineers. This paper presents a possi...
Victor Pollex, Steffen Kollmann, Karsten Albers, F...
DATE
2009
IEEE
109views Hardware» more  DATE 2009»
14 years 3 months ago
A design methodology for fully reconfigurable Delta-Sigma data converters
This paper presents a design methodology for fully reconfigurable low-voltage Delta-Sigma converters as for instance used in next-generation wireless applications. The design metho...
Yi Ke, Jan Craninckx, Georges G. E. Gielen
DATE
2009
IEEE
79views Hardware» more  DATE 2009»
14 years 3 months ago
Solver technology for system-level to RTL equivalence checking
—Checking the equivalence of a system-level model against an RTL design is a major challenge. The reason is that usually the system-level model is written by a system architect, ...
Alfred Kölbl, Reily Jacoby, Himanshu Jain, Ca...
DATE
2009
IEEE
117views Hardware» more  DATE 2009»
14 years 3 months ago
Using dynamic compilation for continuing execution under reduced memory availability
—This paper explores the use of dynamic compilation for continuing execution even if one or more of the memory banks used by an application become temporarily unavailable (but th...
Ozcan Ozturk, Mahmut T. Kandemir
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
14 years 3 months ago
Scalable compile-time scheduler for multi-core architectures
As the number of cores continues to grow in both digital signal and general purpose processors, tools which perform automatic scheduling from model-based designs are of increasing...
Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi,...
DATE
2009
IEEE
139views Hardware» more  DATE 2009»
14 years 3 months ago
Cross-architectural design space exploration tool for reconfigurable processors
—Processors that deploy fine-grained reconfigurable fabrics to implement application-specific accelerators ondemand obtained significant attention within the last decade. They tr...
Lars Bauer, Muhammad Shafique, Jörg Henkel
DATE
2009
IEEE
189views Hardware» more  DATE 2009»
14 years 3 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 3 months ago
A highly resilient routing algorithm for fault-tolerant NoCs
Current trends in technology scaling foreshadow worsening transistor reliability as well as greater numbers of transistors in each system. The combination of these factors will so...
David Fick, Andrew DeOrio, Gregory K. Chen, Valeri...