ICCAD
2001
IEEE
14 years 10 months ago
2001
IEEE
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
ICCAD
2001
IEEE
14 years 10 months ago
2001
IEEE
— Modern sub-micron VLSI designs include huge power grids that are required to distribute large amounts of current, at increasingly lower voltages. The resulting voltage drop on ...
ICCAD
2001
IEEE
14 years 10 months ago
2001
IEEE
In this work, we present an algorithm for simultaneous template generation and matching. The algorithm profiles the graph and iteratively contracts edges to create the templates. ...
ICCAD
2001
IEEE
14 years 10 months ago
2001
IEEE
ICCAD
2001
IEEE
14 years 10 months ago
2001
IEEE
More aggressive design practices have created renewed interest in techniques for analyzing substrate coupling problems. Most previous work has focused primarily on faster techniqu...
ICCAD
2001
IEEE
14 years 10 months ago
2001
IEEE
Given a test set for stuck-at faults, some of primary input values may be changed to opposite logic values without losing fault coverage. We can regard such input values as don’...
ICCAD
2001
IEEE
14 years 10 months ago
2001
IEEE
ICCAD
2001
IEEE
14 years 10 months ago
2001
IEEE
We present a two-level Boolean minimization tool (BOOM) based on a new implicant generation paradigm. In contrast to all previous minimization methods, where the implicants are ge...
ICCAD
2001
IEEE
14 years 10 months ago
2001
IEEE
- This paper presents a spectrally-weighted balanced truncation technique for RLC interconnects, a technique needed when the interconnect circuit parameters change as a result of v...
ICCAD
2001
IEEE
14 years 10 months ago
2001
IEEE
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...