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ICCAD
2002
IEEE
107views Hardware» more  ICCAD 2002»
14 years 6 months ago
Theoretical and practical validation of combined BEM/FEM substrate resistance modeling
In mixed-signal designs, substrate noise originating from the digital part can seriously influence the functionality of the analog part. As such, accurately modeling the properti...
Eelco Schrik, Patrick Dewilde, N. P. van der Meijs
ICCAD
2002
IEEE
80views Hardware» more  ICCAD 2002»
14 years 6 months ago
Minimizing power across multiple technology and design levels
Approaches to achieve low-power and high-speed VLSI's are described with the emphasis on techniques across multiple technology and design levels. To suppress the leakage curr...
Takayasu Sakurai
ICCAD
2002
IEEE
81views Hardware» more  ICCAD 2002»
14 years 6 months ago
Making Fourier-envelope simulation robust
Fourier-envelope algorithms are an important component of the mixed-signal/RF verification toolbox. In this paper, we address the unpredictability and lack of robustness that has...
Jaijeet S. Roychowdhury
ICCAD
2002
IEEE
149views Hardware» more  ICCAD 2002»
14 years 6 months ago
Battery-aware power management based on Markovian decision processes
- This paper addresses the problem of maximizing capacity utilization of the battery power source in a portable electronic system under latency and loss rate constraints. First, a ...
Peng Rong, Massoud Pedram
ICCAD
2002
IEEE
146views Hardware» more  ICCAD 2002»
14 years 6 months ago
Test-model based hierarchical DFT synthesis
With increasing design sizes and adoption of System on a Chip (SoC) methodology, design synthesis and test automation tools are hitting capacity and performance bottlenecks. Curre...
Sanjay Ramnath, Frederic Neuveux, Mokhtar Hirech, ...
ICCAD
2002
IEEE
117views Hardware» more  ICCAD 2002»
14 years 6 months ago
An energy-conscious algorithm for memory port allocation
Multiport memories are extensively used in modern system designs because of the performance advantages they offer. The increased memory access throughput could lead to significan...
Preeti Ranjan Panda, Lakshmikantam Chitturi
ICCAD
2002
IEEE
145views Hardware» more  ICCAD 2002»
14 years 6 months ago
A local circuit topology for inductive parasitics
A novel circuit topology for inductive coupling between interconnecting wires is presented. The model is local, i.e., only coupling between neighboring wires is explicitly modeled...
Andrea Pacelli
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 6 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
ICCAD
2002
IEEE
76views Hardware» more  ICCAD 2002»
14 years 6 months ago
WTA: waveform-based timing analysis for deep submicron circuits
Existing static timing analyzers make several assumptions about circuits, implicitly trading off accuracy for speed. In this paper we examine the validity of these assumptions, no...
Larry McMurchie, Carl Sechen