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    ASPDAC
    1995
    ACM
    96views Hardware» more  ASPDAC 1995»
    Pin assignment and routing on a single-layer Pin Grid Array
    14 years 6 days ago
    Pin assignment and routing on a single-layer Pin Grid Array
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    Man-Fai Yu, Wayne Wei-Ming Dai
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    ASPDAC
    1995
    ACM
    85views Hardware» more  ASPDAC 1995»
    A robust min-cut improvement algorithm based on dynamic look-ahead weighting
    14 years 6 days ago
    A robust min-cut improvement algorithm based on dynamic look-ahead weighting
    Download  www.cecs.uci.edu
    Katsunori Tani
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    ASPDAC
    1995
    ACM
    89views Hardware» more  ASPDAC 1995»
    Some remarks about spectral transform interpretation of MTBDDs and EVBDDs
    14 years 6 days ago
    Some remarks about spectral transform interpretation of MTBDDs and EVBDDs
    Download  www.cecs.uci.edu
    Radomir S. Stankovic
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    ASPDAC
    1995
    ACM
    66views Hardware» more  ASPDAC 1995»
    Region definition and ordering assignment with the minimization of the number of switchboxes
    14 years 6 days ago
    Region definition and ordering assignment with the minimization of the number of switchboxes
    Download  www.cecs.uci.edu
    --In this paper, a region definition and ordering assignment (RDAOA) algorithm on minimizing the number of switchboxes is proposed. The time complexity of the algorithm is proved t...
    Jin-Tai Yan
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    ASPDAC
    1995
    ACM
    108views Hardware» more  ASPDAC 1995»
    Synthesis-for-testability using transformations
    14 years 6 days ago
    Synthesis-for-testability using transformations
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    - We address the problem of transforming a behavioral specification so that synthesis of a testable implementation from the new specification requires significantly less area and ...
    Miodrag Potkonjak, Sujit Dey, Rabindra K. Roy
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    ASPDAC
    1995
    ACM
    79views Hardware» more  ASPDAC 1995»
    Search space reduction in high level synthesis by use of an initial circuit
    14 years 6 days ago
    Search space reduction in high level synthesis by use of an initial circuit
    Download  www.cs.york.ac.uk
    Most existing high-level synthesis(HLS) systems attempt to generate a circuit from a behavioral description \out of the void", using the entire design space as the search dom...
    Atsushi Masuda, Hiroshi Imai, Jeffery P. Hansen, M...
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    ASPDAC
    1995
    ACM
    130views Hardware» more  ASPDAC 1995»
    Design for testability using register-transfer level partial scan selection
    14 years 6 days ago
    Design for testability using register-transfer level partial scan selection
    Download  www.cecs.uci.edu
    Abstract - An approach to top down design for testability using register-transfer level(RTL) partial scan selection is described. We propose a scan selection technique based on tes...
    Akira Motohara, Sadami Takeoka, Toshinori Hosokawa...
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    ASPDAC
    1995
    ACM
    77views Hardware» more  ASPDAC 1995»
    A scheduling algorithm for synthesis of bus-partitioned architectures
    14 years 6 days ago
    A scheduling algorithm for synthesis of bus-partitioned architectures
    Download  www.cs.york.ac.uk
    - Due to efficient interconnect structure and internal parallelism bus-partitioned architectures are very beneficial for sub-micron chip design. This paper presents a new approach ...
    Vasily G. Moshnyaga, Fumiaki Ohbayashi, Keikichi T...
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    ASPDAC
    1995
    ACM
    80views Hardware» more  ASPDAC 1995»
    Limits of using signatures for permutation independent Boolean comparison
    14 years 6 days ago
    Limits of using signatures for permutation independent Boolean comparison
    Download  www.cecs.uci.edu
    Janett Mohnke, Paul Molitor, Sharad Malik
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    ASPDAC
    1995
    ACM
    93views Hardware» more  ASPDAC 1995»
    Architectural simulation for a programmable DSP chip set
    14 years 6 days ago
    Architectural simulation for a programmable DSP chip set
    Download  www.cecs.uci.edu
    Jong Tae Lee, Jaemin Kim, Jae Cheol Son
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