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DATE
2010
IEEE
139views Hardware» more  DATE 2010»
14 years 1 months ago
Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs
We present a Pareto efficient design method for multi-dimensional optimization of run-time reconfigurable streaming applications on CPU/FPGA platforms, which automatically allocate...
Jun Zhu, Ingo Sander, Axel Jantsch
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
14 years 1 months ago
Formal verification of analog circuits in the presence of noise and process variation
We model and verify analog designs in the presence of noise and process variation using an automated theorem prover, MetiTarski. Due to the statistical nature of noise, we propose ...
Rajeev Narayanan, Behzad Akbarpour, Mohamed H. Zak...
DATE
2010
IEEE
145views Hardware» more  DATE 2010»
14 years 1 months ago
Energy-efficient real-time task scheduling with temperature-dependent leakage
Abstract--Leakage power consumption contributes significantly to the overall power dissipation for systems that are manufactured in advanced deep sub-micron technology. Different f...
Chuan-Yue Yang, Jian-Jia Chen, Lothar Thiele, Tei-...
DATE
2010
IEEE
153views Hardware» more  DATE 2010»
14 years 1 months ago
Energy-efficient task allocation and scheduling for multi-mode MPSoCs under lifetime reliability constraint
In this paper, we consider energy minimization for multiprocessor system-on-a-chip (MPSoC) under lifetime reliability constraint of the system, which has become a serious concern ...
Lin Huang, Qiang Xu
DATE
2010
IEEE
149views Hardware» more  DATE 2010»
14 years 1 months ago
Efficient decision ordering techniques for SAT-based test generation
Model checking techniques are promising for automated generation of directed tests. However, due to the prohibitively large time and resource requirements, conventional model chec...
Mingsong Chen, Xiaoke Qin, Prabhat Mishra
DATE
2010
IEEE
140views Hardware» more  DATE 2010»
14 years 1 months ago
Construction of dual mode components for reconfiguration aware high-level synthesis
High-level synthesis has recently started to gain industrial acceptance, due to the improved quality of results and the multi-objective optimizations offered. One optimization area...
George Economakos, Sotirios Xydis, Ioannis Koutras...
CPE
2000
Springer
369views Hardware» more  CPE 2000»
14 years 1 months ago
Petri Net Modelling and Performability Evaluation with TimeNET 3.0
Abstract. This paper presents TimeNET, a software tool for the modelling and performability evaluation using stochastic Petri nets. The tool has been designed especially for models...
Armin Zimmermann, Jörn Freiheit, Reinhard Ger...
CPE
2000
Springer
292views Hardware» more  CPE 2000»
14 years 1 months ago
SREPT: Software Reliability Estimation and Prediction Tool
Abstract. Several tools have been developed for the estimation of software reliability. However, they are highly specialized in the approaches they implement and the particular pha...
Srinivasan Ramani, Kishor S. Trivedi
CPE
2000
Springer
111views Hardware» more  CPE 2000»
14 years 1 months ago
FluidSim: A Tool to Simulate Fluid Models of High-Speed Networks
In this paper we present a tool for the simulation of fluid models of high-speed telecommunication networks. The aim of such a simulator is to evaluate measures which can not be ...
José Incera, Raymond A. Marie, David Ros, G...
CAV
2000
Springer
89views Hardware» more  CAV 2000»
14 years 1 months ago
Tuning SAT Checkers for Bounded Model Checking
Abstract. Bounded Model Checking based on SAT methods has recently been introduced as a complementary technique to BDD-based Symbolic Model Checking. The basic idea is to search fo...
Ofer Strichman