The Dynamic Execution Layer Interface (DELI) offers the following unique capability: it provides fine-grain control over the execution of programs, by allowing its clients to obse...
Giuseppe Desoli, Nikolay Mateev, Evelyn Duesterwal...
This paper presents Vacuum Packing, a new approach to profile-based program optimization. Instead of using traditional aggregate or summarized execution profile weights, this ap...
Ronald D. Barnes, Erik M. Nystrom, Matthew C. Mert...
In a 64-bit processor, many of the data values actually used in computations require much narrower data-widths. In this study, we demonstrate that instruction data-widths exhibit ...
A value’s degree of use—the number of dynamic uses of that value—provides the most essential information needed to optimize its communication. We present simulation results ...
Data prefetching effectively reduces the negative effects of long load latencies on the performance of modern processors. Hardware prefetchers employ hardware structures to predic...
Jamison D. Collins, Suleyman Sair, Brad Calder, De...
1 This paper presents a test input data compression technique, which can be used to reduce input test data volume, test time, and the number of required tester channels. The techni...
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
Conventional fault simulation techniques for FPGAs are very complicated and time consuming. The other alternative, FPGA fault emulation technique, is incomplete, and can be used o...
Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin T...
The continued market demand for GHz processors and high-capacity communication systems results in an increasing number of low-cost high volume ICs with multi-GHz clocks and/or mul...