DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper describes the NPSE, a high-performance SRAM-based network packet search engine which has the primary application of supporting IPv4 and IPv6 forwarding. It is based on ...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
Interconnect delay dominates system delay in modern circuits, and with reduced feature sizes, coupling capacitance and signal crosstalk have become significant issues. By spacing...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
In today’s deep-submicron designs, the interconnect delays contribute an increasing part to the overall performance of an implementation. Particularly when targeting field prog...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
: Modern SoC Design for high-volume products requires a strong focus on Design-for-Test and Designfor-Manufacturability. We present a case study of an SoC test concept, including a...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
In this paper the application of Instruction Set Emulation for rapid prototyping of SoCs will be presented. The emulation works in a way that both the software and the hardware be...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
The new standard DRM for digital radio broadcast in AM band requires integrated devices for radio receivers at low cost and very low power consumption. A chipset is currently desi...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
Smart cards are vulnerable to both invasive and non-invasive attacks. Specifically, non-invasive attacks using power and timing measurements to extract the cryptographic key has d...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE