DFT
2003
IEEE
14 years 2 months ago
2003
IEEE
For system-on-chip designs that contain an embedded processor, this paper present a software based diagnosis scheme that can make use of the processor to aid in diagnosis in a sca...
DFT
2003
IEEE
14 years 2 months ago
2003
IEEE
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
DFT
2003
IEEE
14 years 2 months ago
2003
IEEE
In the last years, new requirements in terms of vehicle performance increased significantly the amount of on-board electronics, thus raising more concern about safety and fault to...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
In system-level platform-based embedded systems design, the mapping model is a crucial link between the application model and the architecture model. All three models must match w...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
We present an integrated approach that provides fault tolerance and dynamic power management for a real-time task executing in an embedded system. Fault tolerance is achieved thro...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
Data correlation is a well-known problem that causes difficulty in VLSI testing. Based on a correlation metric, an efficient heuristic to select BIST registers has been proposed...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
Circuit marginality failures in high performance VLSI circuits are projected to increase due to shrinking process geometries and high frequency design techniques. Capacitive cross...