Sciweavers

DATE
2005
IEEE
120views Hardware» more  DATE 2005»
14 years 2 months ago
Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints
Supply voltage scaling and adaptive body-biasing are important techniques that help to reduce the energy dissipation of embedded systems. This is achieved by dynamically adjusting...
Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Z...
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
14 years 2 months ago
Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture
The increasing complexity and the short life cycles of embedded systems are pushing the current system-onchip designs towards a rapid increasing on the number of programmable proc...
Alexandre M. Amory, Marcelo Lubaszewski, Fernando ...
DATE
2005
IEEE
87views Hardware» more  DATE 2005»
14 years 2 months ago
Concurrent Error Detection in Asynchronous Burst-Mode Controllers
We discuss the problem of Concurrent Error Detection (CED) in a popular class of asynchronous controllers, namely Burst-Mode machines. We first outline the particularities of the...
Sobeeh Almukhaizim, Yiorgos Makris
DATE
2005
IEEE
101views Hardware» more  DATE 2005»
14 years 2 months ago
TSUNAMI: An Integrated Timing-Driven Place And Route Research Platform
In this paper, we present an experimental integrated platform for the research, development and evaluation of new VLSI back-end algorithms and design flows. Interconnect scaling ...
Christophe Alexandre, Hugo Clément, Jean-Pa...
DATE
2005
IEEE
151views Hardware» more  DATE 2005»
14 years 2 months ago
Multithreaded Extension to Multicluster VLIW Processors for Embedded Applications
Instruction Level Parallelism (ILP) extraction for multicluster VLIW processors is a very hard task. In this paper, we propose a retargetable architecture that can exploit ILP and...
Domenico Barretta, William Fornaciari, Mariagiovan...
DATE
2005
IEEE
96views Hardware» more  DATE 2005»
14 years 2 months ago
Systematic Figure of Merit Computation for the Design of Pipeline ADC
Ludovic Barrandon, S. Crand, Dominique Houzet
DATE
2005
IEEE
96views Hardware» more  DATE 2005»
14 years 2 months ago
Framework for Fault Analysis and Test Generation in DRAMs
Abstract: With the increasing complexity of memory behavior, attempts are being made to come up with a methodical approach that employs electrical simulation to tackle the memory t...
Zaid Al-Ars, Said Hamdioui, Georg Mueller, A. J. v...
DATE
2005
IEEE
172views Hardware» more  DATE 2005»
14 years 2 months ago
Correct-by-Construction Transformations across Design Environments for Model-Based Embedded Software Development
Embedded software design for real time reactive system
Massimo Baleani, Alberto Ferrari, Leonardo Mangeru...