DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
In this paper we present our contribution in terms of synchronization processor for a SoC design methodology based on the theory of the latency insensitive systems (LIS) of Carlon...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
This paper presents a scheme to combine memory and power management for achieving better energy reduction. Our method periodically adjusts the size of physical memory and the time...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
This paper gives an overview of a new technique, named pseudo-ring testing (PRT). PRT can be applied for testing wide type of random access memories (RAM): bitor word-oriented and...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Ultra-wideband (UWB) communication is an emerging wireless technology that promises high data rates over short distances and precise locationing. The large available bandwidth and...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-qua...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
— With increasing process fluctuations in nano-scale technology, testing for delay faults is becoming essential in manufacturing test to complement stuck-at-fault testing. Desig...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
The purpose of this paper is to formally specify a flow devoted to the design of Differential Power Analysis (DPA) resistant QDI asynchronous circuits. The paper first proposes a ...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
We present a hybrid BIST approach that extracts the most frequently occurring sequences from deterministic test patterns; these extracted sequences are stored on-chip. We use clus...