DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
In this paper, we propose a new circuit transformation technique in conjunction with the use of a special diagnostic test pattern, named SO-SLAT pattern, to achieve higher multipl...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
Using additional store-checkpoinsts (SCPs) and compare-checkpoints (CCPs), we present an adaptive checkpointing for double modular redundancy (DMR) in this paper. The proposed app...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
Recent research on performance analysis for embedded systems shows a trend to formal compositional models and methods. These compositional methods can be used to determine the per...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
Fast failure analysis is a key enabler in shortening the
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
In this paper we present a state dependent analytical leakage power model for FPGAs. The model accounts for subthreshold leakage and gate leakage in FPGAs, since these are the two...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
Concurrent programs are difficult to write, reason about, re-use, and maintain. In particular, for system-level ions that use a shared memory abstraction for thread or process syn...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
The impact of test conditions on the detectability of open defects is investigated. We performed an inductive fault analysis on representative standard gates. The simulation resul...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
—In this paper we describe a methodology to measure exactly the quality of fault-tolerant designs by combining faultinjection in high level design (HLD) descriptions with a forma...