Sciweavers

DATE
2006
IEEE
109views Hardware» more  DATE 2006»
14 years 3 months ago
A methodology for mapping multiple use-cases onto networks on chips
A communication-centric design approach, Networks on Chips (NoCs), has emerged as the design paradigm for designing a scalable communication infrastructure for future Systems on C...
Srinivasan Murali, Martijn Coenen, Andrei Radulesc...
DATE
2006
IEEE
134views Hardware» more  DATE 2006»
14 years 3 months ago
ASIP-based multiprocessor SoC design for simple and double binary turbo decoding
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory a...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
DATE
2006
IEEE
77views Hardware» more  DATE 2006»
14 years 3 months ago
Proven correct monitors from PSL specifications
Katell Morin-Allory, Dominique Borrione
DATE
2006
IEEE
66views Hardware» more  DATE 2006»
14 years 3 months ago
Power/performance hardware optimization for synchronization intensive applications in MPSoCs
This paper explores optimization techniques of the synchronization mechanisms for MPSoCs based on complex interconnect (Network-on-Chip), targeted at future powerefficient system...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
14 years 3 months ago
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
DATE
2006
IEEE
122views Hardware» more  DATE 2006»
14 years 3 months ago
Power analysis of mobile 3D graphics
— The world of 3D graphics, until recently restricted to high-end workstations and game consoles, is rapidly expanding into the domain of mobile platforms such as cellular phones...
Bren Mochocki, Kanishka Lahiri, Srihari Cadambi
DATE
2006
IEEE
105views Hardware» more  DATE 2006»
14 years 3 months ago
Optical routing for 3D system-on-package
Abstract— Optical interconnects enable faster signal propagation with virtually no crosstalk. In addition, wavelength division multiplexing allows a single waveguide to be shared...
Jacob R. Minz, Somaskanda Thyagaraja, Sung Kyu Lim
DATE
2006
IEEE
80views Hardware» more  DATE 2006»
14 years 3 months ago
Energy-efficient FPGA interconnect design
Despite recent advances in FPGA devices and embedded cores, their deployment in commercial products remains rather limited due to practical constraints on, for example, cost, size...
Maurice Meijer, Rohini Krishnan, Martijn T. Benneb...
DATE
2006
IEEE
88views Hardware» more  DATE 2006»
14 years 3 months ago
Using conjugate symmetries to enhance gate-level simulations
State machine based simulation of Boolean functions is substantially faster if the function being simulated is symmetric. Unfortunately function symmetries are comparatively rare....
Peter M. Maurer