DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
Today’s nanometer technology trends have a very negative impact on the reliability of semiconductor products. Intermittent faults constitute the largest part of reliability fail...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
Functional validation is a major bottleneck in pipelined processor design. Simulation using functional test vectors is the most widely used form of processor validation. While exi...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
Most of the challenges related to the development of multi-processor platforms for complex wireless and multimedia applications fall into the Electronic System Level (ESL) domain....
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
In traditional parallel co-simulation approaches, the simulation speed is heavily limited by time synchronization overhead between simulators and idle time caused by data dependen...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
Multimedia and communication algorithms from embedded system domain often make extensive use of floating-point arithmetic. Due to the complexity and expense of the floating-poin...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...