ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
The application of general clock skew scheduling is practically limited due to the difficulties in implementing a wide spectrum of dedicated clock delays in a reliable manner. Th...
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
Under modern VLSI technology, process variations greatly affect circuit performance, especially clock skew which is very timing sensitive. Unwanted skew due to process variation f...
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
We preseM an algorithm for compiler-driven regisrer mme adjustment with rhe main goal of power minimization on instruction fetch und mgisterjile access. In mosr instruction set ar...
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
Modeling and simulating pipelined processors in procedural languages such as C/C++ requires lots of cost in handling concurrent events, which hinders fast simulation. A number of ...
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
As the clock frequencies used in industrial applications increase, the timing requirements imposed on routing problems become tighter. So, it becomes important to route the nets w...
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
This paper proposes a model for calculating statistical gate-delay variation caused by intra-chip and inter-chip variability. As the variation of individual gate delays directly i...
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE