ICCAD
2004
IEEE
14 years 9 months ago
2004
IEEE
This paper presents the Routing Cost Valleys (RCV) algorithm – the first published algorithm that simultaneously optimizes all short- and long-path timing constraints in a Field...
ICCAD
2004
IEEE
14 years 9 months ago
2004
IEEE
As the technology progresses, interconnect delays have become bottlenecks of chip performance. Three dimensional (3D) integrated circuits are proposed as one way to address this p...
ICCAD
2004
IEEE
14 years 9 months ago
2004
IEEE
ICCAD
2004
IEEE
14 years 9 months ago
2004
IEEE
— This paper presents two contributions. The first is an incremental placement algorithm for placement-aware logic synthesis along with a proof of optimality. The algorithm can ...
ICCAD
2004
IEEE
14 years 9 months ago
2004
IEEE
With the increase of design complexities and the decrease of minimal feature sizes, IP reuse is becoming a common practice while crosstalk is becoming a critical issue that must b...
ICCAD
2004
IEEE
14 years 9 months ago
2004
IEEE
To ensure the power and signal integrity of modern VLSI circuits, it is crucial to analyze huge amount of nonlinear devices together with enormous interconnect and even substrate ...
ICCAD
2004
IEEE
14 years 9 months ago
2004
IEEE
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...
ICCAD
2004
IEEE
14 years 9 months ago
2004
IEEE
It is common wisdom that synthesizing hardware from higher-level descriptions than Verilog will incur a performance penalty. The case study here shows that this need not be the ca...
ICCAD
2004
IEEE
14 years 9 months ago
2004
IEEE
ICCAD
2004
IEEE
14 years 9 months ago
2004
IEEE
In this paper, we propose a new technique for the combined voltage scaling of processors and communication links, taking into account dynamic as well as leakage power consumption....