TJS
2008
14 years 10 days ago
2008
Multiple memory models have been proposed to capture the effects of memory hierarchy culminating in the I-O model of Aggarwal and Vitter [?]. More than a decade of architectural a...
MAM
2006
14 years 12 days ago
2006
Deep layer processing and increasing line rates present a memory challenge to processor
CDES
2006
14 years 1 months ago
2006
Memory accesses have always been a speed-limiting factor, and memory bandwidth has always been an intensively contended scarce resource. Nevertheless, with recent pervasive emergen...
CC
2008
Springer
14 years 2 months ago
2008
Springer
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...
ISCA
1995
IEEE
14 years 4 months ago
1995
IEEE
Communicationin aparallel systemfrequently involvesmoving data from the memory of one node to the memory of another; this is the standard communication model employedin message pa...
HPCA
1995
IEEE
14 years 4 months ago
1995
IEEE
As processor speeds increase relative to memory speeds, memory bandwidth is rapidly becoming the limiting performance factor for many applications. Several approaches to bridging ...
HPCA
1995
IEEE
14 years 4 months ago
1995
IEEE
Information on the behavior of programs is essential for deciding the number and nature of functional units in high performance architectures. In this paper, we present studies on...
HICSS
1995
IEEE
14 years 4 months ago
1995
IEEE
The computing community has long faced the problem of scientifically comparing different computers and different algorithms. When architecture, method, precision, or storage capac...
EUROPAR
1995
Springer
14 years 4 months ago
1995
Springer
The growing disparity between processor and memory speeds has caused memory bandwidth to become the performance bottleneck for many applications. In particular, this performance ga...
CODES
2004
IEEE
14 years 4 months ago
2004
IEEE
The memory bandwidth largely determines the performance and energy cost of embedded systems. At the compiler level, several techniques improve the memory bandwidth at the scope of...