Sciweavers

RTSS
2005
IEEE
14 years 5 months ago
ParaScale: Exploiting Parametric Timing Analysis for Real-Time Schedulers and Dynamic Voltage Scaling
Static timing analysis safely bounds worst-case execution times to determine if tasks can meet their deadlines in hard real-time systems. However, conventional timing analysis req...
Sibin Mohan, Frank Mueller, William Hawkins, Micha...
ISQED
2005
IEEE
92views Hardware» more  ISQED 2005»
14 years 5 months ago
An Interconnect Insensitive Linear Time-Varying Driver Model for Static Timing Analysis
This paper presents a two-step, RC-interconnect insensitive linear time-varying (LTV) driver model for gate-level timing calculation. We show how to characterize a driver with the...
Chung-Kuan Tsai, Malgorzata Marek-Sadowska
DATE
2005
IEEE
132views Hardware» more  DATE 2005»
14 years 5 months ago
Statistical Timing Analysis using Levelized Covariance Propagation
Variability in process parameters is making accurate timing analysis of nano-scale integrated circuits an extremely challenging task. In this paper, we propose a new algorithm for...
Kunhyuk Kang, Bipul Chandra Paul, Kaushik Roy
SAC
2006
ACM
14 years 5 months ago
Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...
ASPDAC
2006
ACM
137views Hardware» more  ASPDAC 2006»
14 years 5 months ago
Parameterized block-based non-gaussian statistical gate timing analysis
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
GLVLSI
2006
IEEE
143views VLSI» more  GLVLSI 2006»
14 years 5 months ago
SACI: statistical static timing analysis of coupled interconnects
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, A...
DATE
2006
IEEE
129views Hardware» more  DATE 2006»
14 years 5 months ago
Non-gaussian statistical interconnect timing analysis
This paper focuses on statistical interconnect timing analysis in a parameterized block-based statistical static timing analysis tool. In particular, a new framework for performin...
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
ISORC
2007
IEEE
14 years 5 months ago
Experiences from Applying WCET Analysis in Industrial Settings
Knowing the program timing characteristics is fundamental to the successful design and execution of real-time systems. Today, measurement-based timing analysis tools such as in-ci...
Jan Gustafsson, Andreas Ermedahl
ECRTS
2007
IEEE
14 years 5 months ago
Cache-Aware Timing Analysis of Streaming Applications
Of late, there has been a considerable interest in models, algorithms and methodologies specifically targeted towards designing hardware and software for streaming applications. ...
Samarjit Chakraborty, Tulika Mitra, Abhik Roychoud...
RTAS
2008
IEEE
14 years 6 months ago
Hybrid Timing Analysis of Modern Processor Pipelines via Hardware/Software Interactions
Embedded systems are often subject to constraints that require determinism to ensure that task deadlines are met. Such systems are referred to as real-time systems. Schedulability...
Sibin Mohan, Frank Mueller