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ISPD
1998
ACM
99views Hardware» more  ISPD 1998»
14 years 5 days ago
New efficient algorithms for computing effective capacitance
We describe a novel iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. Our new approach is considerably faster than p...
Andrew B. Kahng, Sudhakar Muddu
FPGA
2008
ACM
142views FPGA» more  FPGA 2008»
13 years 10 months ago
Modeling routing demand for early-stage FPGA architecture development
Architecture development for FPGAs has typically been a very empirical discipline, requiring the synthesis of benchmark circuits into candidate architectures. This is difficult to...
Wei Mark Fang, Jonathan Rose
ISQED
2002
IEEE
128views Hardware» more  ISQED 2002»
14 years 1 months ago
Inductive Characteristics of Power Distribution Grids in High Speed Integrated Circuits
— The inductive characteristics of several types of gridded power distribution networks are described in this paper. The inductance extraction program FastHenry is used to evalua...
Andrey V. Mezhiba, Eby G. Friedman
DAC
2008
ACM
14 years 9 months ago
Driver waveform computation for timing analysis with multiple voltage threshold driver models
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
Peter Feldmann, Soroush Abbaspour, Debjit Sinha, G...
DATE
2002
IEEE
102views Hardware» more  DATE 2002»
14 years 1 months ago
Improving Placement under the Constant Delay Model
In this paper, we show that under the constant delay model the placement problem is equivalent to minimizing a weighted sum of wire lengths. The weights can be efficiently compute...
Kolja Sulimma, Wolfgang Kunz, Ingmar Neumann, Luka...