12 search results - page 1 / 3 » An efficient algorithm for performance-optimal FPGA technolo... |
TCAD
1998
13 years 7 months ago
1998
FPGA
1998
ACM
13 years 11 months ago
1998
ACM
In this paper, we present a new retiming-based technology mapping algorithm for look-up table-based eld programmable gate arrays. The algorithm is based on a novel iterative proce...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
ASPDAC
2004
ACM
13 years 11 months ago
2004
ACM
- Minimum area is one of the important objectives in technology mapping for lookup table-based FPGAs. It has been proven that the problem is NP-complete. This paper presents a poly...
FPGA
2000
ACM
13 years 11 months ago
2000
ACM
In this paper, we study the technology mapping problem for a novel FPGA architecture that is based on k-input single-output PLA-like cells, or, k/m-macrocells. Each cell in this a...