115 search results - page 11 / 23 » Analysis and optimization of gate leakage current of power g... |
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Power Gating is effective for reducing leakage power. Previously, a Distributed Sleep Transistor Network (DSTN) was proposed to reduce the sleep transistor area by connecting all ...
ISQED
2009
IEEE
14 years 2 months ago
2009
IEEE
— This paper revisits and extends a general linear programming(LP) formulation to exploit multiple knobs such as multi-Lgate footprint-compatible libraries and post-layout Lgateb...
TVLSI
2010
13 years 2 months ago
2010
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
ICCAD
2009
IEEE
2009
IEEE
An efficient wakeup scheduling considering resource constraint for sensor-based power gating designs
13 years 5 months ago
Power gating has been a very effective way to reduce leakage power. One important design issue for a power gating design is to limit the surge current during the wakeup process. N...
VLSID
2001
IEEE
14 years 8 months ago
2001
IEEE
Development of the process technology for dual threshold (dual Vth ) CMOS circuit has opened up the possibility of using it to reduce static power in low voltage high performance ...