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TODAES
2008
158views more  TODAES 2008»
13 years 8 months ago
Designing secure systems on reconfigurable hardware
The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integ...
Ted Huffmire, Brett Brotherton, Nick Callegari, Jo...
ITC
2000
IEEE
123views Hardware» more  ITC 2000»
14 years 16 days ago
Combinational logic synthesis for diversity in duplex systems
We describe logic synthesis techniques for designing diverse implementations of combinational logic circuits in order to maximize the data integrity of diverse duplex systems in t...
Subhasish Mitra, Edward J. McCluskey
DAC
2007
ACM
14 years 9 months ago
IPR: An Integrated Placement and Routing Algorithm
Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
Min Pan, Chris C. N. Chu
MICRO
2008
IEEE
208views Hardware» more  MICRO 2008»
14 years 2 months ago
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
Wangyuan Zhang, Tao Li
ISCAS
2006
IEEE
122views Hardware» more  ISCAS 2006»
14 years 2 months ago
256-channel integrated neural interface and spatio-temporal signal processor
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...
J. N. Y. Aziz, Roman Genov, B. R. Bardakjian, M. D...