218 search results - page 31 / 44 » Architecture Level Power-Performance Tradeoffs for Pipelined... |
DAC
2006
ACM
14 years 10 months ago
2006
ACM
Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet m...
FPGA
2004
ACM
14 years 2 months ago
2004
ACM
We describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is written in the Bluespec hardware description language (HDL) and suppo...
LCTRTS
2007
Springer
14 years 3 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
ASPDAC
2005
ACM
13 years 11 months ago
2005
ACM
— A novel wave-pipelined global interconnect system is developed for reliable, high throughput, on-chip data communication. We argue that because there is only a single signal pr...
ICCAD
2002
IEEE
14 years 5 months ago
2002
IEEE
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...