1381 search results - page 35 / 277 » Architecture and Design of a High Performance SRAM for SOC D... |
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
—Real-time spatio-temporal VLSI 3D IIR digital filters may be used for imaging or beamforming applications employing 3D input signals from synchronously-sampled multi-sensor arra...
MICRO
2007
IEEE
14 years 2 months ago
2007
IEEE
Process variations will greatly impact the stability, leakage power consumption, and performance of future microprocessors. These variations are especially detrimental to 6T SRAM ...
ASAP
2009
IEEE
14 years 2 months ago
2009
IEEE
—The Spectral Hash algorithm is one of the Round 1 candidates for the SHA-3 family, and is based on spectral arithmetic over a finite field, involving multidimensional discrete...
DAC
1994
ACM
14 years 4 days ago
1994
ACM
We describe ASTRX/OBLX, a synthesis system that can size high-performance analog circuit topologies to meet usersupplied linear performance specifications without designer-supplied...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...