134 search results - page 19 / 27 » Architecture driven circuit partitioning |
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Extending 2-D planar topologies in integrated circuits (ICs) to a 3-D implementation has the obvious benefits of reducing the overall footprint and average interconnection length,...
ASAP
2008
IEEE
14 years 2 months ago
2008
IEEE
As semiconductor processing technology continues to scale down, managing reliability becomes an increasingly difficult challenge in high-performance microprocessor design. Transie...
ASPDAC
2000
ACM
14 years 5 days ago
2000
ACM
Global placement of hypergraphs is critical in the top-down placement of large timing-driven designs 10, 16 . Placement quality is evaluated in terms of the half-perimeter wirelen...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Driven by continuing scaling of Moore's law, chip multiprocessors and systems-on-a-chip are expected to grow the core count from dozens today to hundreds in the near future. ...
DAC
2004
ACM
14 years 1 months ago
2004
ACM
In order to improve the testabilities and power consumption, a new state assignment technique based on m-block partition is introduced in this paper. The length and number of feed...