188 search results - page 4 / 38 » Automatic Model Refinement for Fast Architecture Exploration |
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
For successful SoC design, efficient and scalable communication architecture is crucial. Some bus interconnects now provide configurable structures to meet this requirement of an ...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Customizing the bypasses in an embedded processor uncovers valuable trade-offs between the power, performance and the cost of the processor. Meaningful exploration of bypasses re...
VLSI
2010
Springer
13 years 2 months ago
2010
Springer
Future systems will have to support multiple and concurrent dynamic compute-intensive applications, while respecting real-time and energy consumption constraints. To overcome these...
FPL
2003
Springer
14 years 20 days ago
2003
Springer
At Leiden Embedded Research Center (LERC), we are building a tool chain called Compaan/Laura that allows us to map fast and efficiently applications written in Matlab onto recon...