205 search results - page 39 / 41 » Clock gating architectures for FPGA power reduction |
DAC
2004
ACM
14 years 2 months ago
2004
ACM
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
DATE
2004
IEEE
14 years 2 months ago
2004
IEEE
Mobile video processing as defined in standards like MPEG-4 and H.263 contains a number of timeconsuming computations that cannot be efficiently executed on current hardware archi...
DATE
2010
IEEE
14 years 3 months ago
2010
IEEE
Deep Packet Inspection (DPI) involves searching a packet's header and payload against thousands of rules to detect possible attacks. The increase in Internet usage and growing...
HPCA
2003
IEEE
14 years 11 months ago
2003
IEEE
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
DAC
2006
ACM
14 years 11 months ago
2006
ACM
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...