96 search results - page 13 / 20 » Clock-Aware Placement for FPGAs |
ASPDAC
2004
ACM
14 years 24 days ago
2004
ACM
Abstract—The dynamic power consumed by a digital CMOS circuit is directly proportional to capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and...
FCCM
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
FPGA
2005
ACM
14 years 27 days ago
2005
ACM
We present an automatic logic synthesis method targeted for highperformance asynchronous FPGA (AFPGA) architectures. Our method transforms sequential programs as well as high-leve...
19
Voted
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Previous research has shown both theoretically and practically that simulated annealing can greatly benefit from the incorporation of an adaptive range limiting window to control ...
FPL
2005
Springer
14 years 27 days ago
2005
Springer
In this paper, we propose a placement method for islandstyle FPGAs, based on recursive bi-partitioning followed by application of space-filling curves. Experimental results of ou...