1133 search results - page 29 / 227 » Compiling for Speculative Architectures |
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
ISCA
2006
IEEE
14 years 2 months ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
HPCA
2002
IEEE
14 years 8 months ago
2002
IEEE
Several studies of speculative execution based on values have reported promising performance potential. However, virtually all microarchitectures in these studies were described i...
HPCA
2003
IEEE
14 years 8 months ago
2003
IEEE
Inherent within complex instruction set architectures such as x86 are inefficiencies that do not exist in a simpler ISAs. Modern x86 implementations decode instructions into one o...