In this paper we consider transistor sizing to reduce crosstalk. First, crosstalk noise dependency on wire width, wire spacing, driver and receiver sizes are discussed, and valida...
Abstract-- Scaling the minimum feature size of VLSI circuits to sub-quarter micron and its clock frequency to 2GHz has caused crosstalk noise to become a serious problem, that degr...
Abstract— This paper presents a post-route, timingconstrained gate-sizing algorithm for crosstalk reduction. Gate-sizing has emerged as a practical and feasible method to reduce ...
As chip size and design density increase, coupling effects (crosstalk) between signal wires become increasingly critical to on–chip timing and even functionality. A method is pr...
Multiple supply voltages, multiple transistor thresholds and transistor sizing could be used to reduce the power dissipation of digital blocks. This paper presents a framework for...