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116
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DATE
2003
IEEE
116views Hardware» more  DATE 2003»
15 years 8 months ago
Development and Application of Design Transformations in ForSyDe
The ForSyDe methodology has been developed for system level design. Starting with a formal specification model, that captures the functionality of the system at a high abstractio...
Ingo Sander, Axel Jantsch, Zhonghai Lu
DATE
2002
IEEE
144views Hardware» more  DATE 2002»
15 years 8 months ago
Design Automation for Deepsubmicron: Present and Future
Advancing technology drives design technology and thus design automation EDA. How to model interconnect, how to handle degradation of signal integrity and increasing power densi...
Ralph H. J. M. Otten, Raul Camposano, Patrick Groe...
164
Voted
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 7 months ago
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
For successful SoC design, efficient and scalable communication architecture is crucial. Some bus interconnects now provide configurable structures to meet this requirement of an ...
Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-...
110
Voted
DATE
2007
IEEE
123views Hardware» more  DATE 2007»
15 years 9 months ago
Clock domain crossing fault model and coverage metric for validation of SoC design
Multiple asynchronous clock domains have been increasingly employed in System-on-Chip (SoC) designs for different I/O interfaces. Functional validation is one of the most expensiv...
Yi Feng 0002, Zheng Zhou, Dong Tong, Xu Cheng
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
15 years 9 months ago
Heterogeneous behavioral hierarchy for system level designs
Enhancing productivity for designing complex embedded systems requires system level design methodology and language support for capturing complex design in high level models. For ...
Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Ber...