Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...
System-levelpartitioning assigns functionalobjects such as tasks or code segments to system-level components such as o-the-shelf processors or application-specic architectures in...
Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent research advocates using "resizable" caches to exploit cache requir...
Se-Hyun Yang, Michael D. Powell, Babak Falsafi, T....
The deployment of future deep submicron technology calls for a careful review of existing cache organizations and design practices in terms of yield and performance. This paper pr...
Soft error reliability is increasingly becoming a first-order design concern for microprocessors, as a result of higher transistor counts, shrinking device geometries and lowering ...