11 search results - page 1 / 3 » Designing CMOS molecular memories while considering device p... |
JETC
2007
13 years 7 months ago
2007
DAC
2004
ACM
14 years 8 months ago
2004
ACM
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...
TCAD
2008
13 years 7 months ago
2008
As CMOS technology is scaled down toward the nanoscale regime, drastically growing leakage currents and variations in device characteristics are becoming two important design chall...
ISCAS
1999
IEEE
13 years 11 months ago
1999
IEEE
- Micromachined power sensors with operation up to 50 GHz were recently achieved in CMOS technology [1]. To improve their sensitivity and signal-to-noise ratio, while maintaining m...
VLSID
2010
IEEE
13 years 11 months ago
2010
IEEE
A novel design approach for simultaneous power and stability (static noise margin, SNM) optimization of nanoCMOS static random access memory (SRAM) is presented. A 45nm single-end...