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» Diagonal routing in high performance microprocessor design
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VLSID
2002
IEEE
142views VLSI» more  VLSID 2002»
14 years 7 months ago
Architecture and Design of a High Performance SRAM for SOC Design
Critical issues in designing a high speed, low power static RAM in deep submicron technologies are described along with the design techniques used to overcome them. With appropria...
Shobha Singh, Shamsi Azmi, Nutan Aarawal, Penaka P...
DAC
2004
ACM
14 years 8 months ago
Design optimizations for microprocessors at low temperature
We investigate trade-offs in microprocessor frequency and system power achievable for low temperature operation in scaled high leakage technologies by combining refrigeration with...
Arman Vassighi, Ali Keshavarzi, Siva Narendra, Ger...
DAC
2003
ACM
14 years 8 months ago
Parameter variations and impact on circuits and microarchitecture
Parameter variation in scaled technologies beyond 90nm will pose a major challenge for design of future high performance microprocessors. In this paper, we discuss process, voltag...
Shekhar Borkar, Tanay Karnik, Siva Narendra, James...
DAC
2005
ACM
14 years 8 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
EUROPAR
1999
Springer
13 years 11 months ago
An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors
Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism ILP techniques that are traditionally used in high perform...
Daniel A. Connors, Jean-Michel Puiatti, David I. A...