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TVLSI
2010
14 years 9 months ago
Variation-Aware System-Level Power Analysis
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
DAC
2006
ACM
16 years 4 months ago
Stochastic variational analysis of large power grids considering intra-die correlations
For statistical timing and power analysis that are very important problems in the sub-100nm technologies, stochastic analysis of power grids that characterizes the voltage fluctua...
Praveen Ghanta, Sarma B. K. Vrudhula, Sarvesh Bhar...
CODES
2004
IEEE
15 years 6 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
DATE
2005
IEEE
115views Hardware» more  DATE 2005»
15 years 8 months ago
Stochastic Power Grid Analysis Considering Process Variations
In this paper, we investigate the impact of interconnect and device process variations on voltage fluctuations in power grids. We consider random variations in the power grid’s...
Praveen Ghanta, Sarma B. K. Vrudhula, Rajendran Pa...
ICCD
2008
IEEE
142views Hardware» more  ICCD 2008»
16 years 2 hour ago
Making register file resistant to power analysis attacks
— Power analysis attacks are a type of side-channel attacks that exploits the power consumption of computing devices to retrieve secret information. They are very effective in br...
Shuo Wang, Fan Zhang, Jianwei Dai, Lei Wang, Zhiji...