13 search results - page 2 / 3 » Direct synthesis of timed circuits from free-choice STGs |
DAC
1999
ACM
14 years 8 months ago
1999
ACM
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...
ICCAD
1998
IEEE
13 years 12 months ago
1998
IEEE
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
In this paper, we present a reduced order inodeling methodology, based on the utilization of optimal non-uniform grids generated by Gaussian spectral rules, for the direct passive...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a s...