157 search results - page 5 / 32 » Dynamic Voltage and Cache Reconfiguration for Low Power |
ICCD
2007
IEEE
14 years 4 months ago
2007
IEEE
This paper proposes a new low power cache architecture that utilizes fault tolerance to allow aggressively reduced voltage levels. The fault tolerant overhead circuits consume lit...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
This paper describes a dynamic voltage and frequency scaling (DVFS) technique for MPEG decoding to reduce the energy consumption using the computational workload decomposition. Th...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
ISLPED
2007
ACM
13 years 8 months ago
2007
ACM
Dynamic voltage scaling (DVS) is known to be one of the most efficient techniques for power reduction of integrated circuits. Efficient low voltage DC-DC conversion is a key enabl...
ICCD
2007
IEEE
14 years 4 months ago
2007
IEEE
The cache hierarchy of state-of-the-art—especially multicore—microprocessors consumes a significant amount of area and energy. A significant amount of research has been devo...