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ASPLOS
2010
ACM
14 years 2 months ago
A real system evaluation of hardware atomicity for software speculation
In this paper we evaluate the atomic region compiler abstraction by incorporating it into a commercial system. We find that atomic regions are simple and intuitive to integrate i...
Naveen Neelakantam, David R. Ditzel, Craig B. Zill...
CODES
2006
IEEE
13 years 9 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
14 years 4 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
SAMOS
2007
Springer
14 years 1 months ago
Evaluating Large System-on-Chip on Multi-FPGA Platform
This paper presents a configurable base architecture tailorable for different applications. It allows simple and rapid way to evaluate and prototype large Multi-Processor System-on...
Ari Kulmala, Erno Salminen, Timo D. Hämä...
DATE
2008
IEEE
133views Hardware» more  DATE 2008»
14 years 2 months ago
Memory Organization with Multi-Pattern Parallel Accesses
We propose an interleaved memory organization supporting multi-pattern parallel accesses in twodimensional (2D) addressing space. Our proposal targets computing systems with high ...
Arseni Vitkovski, Georgi Kuzmanov, Georgi Gaydadji...