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IFIPPACT
1994
13 years 8 months ago
Microcode Generation for Flexible Parallel Target Architectures
: Advanced architectural features of microprocessors like instruction level parallelism and pipelined functional hardware units require code generation techniques beyond the scope ...
Rainer Leupers, Wolfgang Schenk, Peter Marwedel
DATE
2006
IEEE
88views Hardware» more  DATE 2006»
14 years 1 months ago
Enabling fine-grain leakage management by voltage anchor insertion
Functional unit shutdown based on MTCMOS devices is effective for leakage reduction in aggressively scaled technologies. However, the applicability of MTCMOS-based shutdown in a s...
Pietro Babighian, Luca Benini, Alberto Macii, Enri...
ICCAD
2005
IEEE
83views Hardware» more  ICCAD 2005»
14 years 3 months ago
Post-placement rewiring and rebuffering by exhaustive search for functional symmetries
Separate optimizations of logic and layout have been thoroughly studied in the past and are well documented for common benchmarks. However, to be competitive, modern circuit optim...
Kai-Hui Chang, Igor L. Markov, Valeria Bertacco
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 3 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
ISPD
1999
ACM
126views Hardware» more  ISPD 1999»
13 years 11 months ago
Partitioning by iterative deletion
Netlist partitioning is an important and well studied problem. In this paper, a linear time partitioning approach based on iterative deletion is presented. We use the partitioning...
Patrick H. Madden