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DAC
2001
ACM
14 years 11 months ago
2001
ACM
This work presents a new and computationally efficient performance optimization technique for distributed RLC interconnects based on a rigorous delay computation scheme. The new o...
DAC
2002
ACM
14 years 11 months ago
2002
ACM
In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net, to model real-delay switching activity for power estimation is proposed. The logic circuit i...
ISCC
2005
IEEE
14 years 3 months ago
2005
IEEE
We report an innovative solely optical architecture to implement the centralized wavelength conversion module of the CWC (Controlled Wavelength Conversion) protocol [1]. The propo...
FPL
2009
Springer
14 years 2 months ago
2009
Springer
Custom operators, working at custom precisions, are a key ingredient to fully exploit the FPGA flexibility advantage for high-performance computing. Unfortunately, such operators...
ASAP
2007
IEEE
14 years 1 months ago
2007
IEEE
Dynamic reconfiguration allows to selectively substitute blocks of logic at run-time in order to improve the area efficiency of a FPGA design. This paper presents the design of a ...