SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...
This paper proposes an efficient analysis flow and an algorithm to identify the worst case noise for power networks with multiple clock domains. First, we apply the Laplace transf...
Wanping Zhang, Ling Zhang, Rui Shi, He Peng, Zhi Z...
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
Lin Zhong, Srivaths Ravi, Anand Raghunathan, Niraj...
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
Ashish Darbari, Bashir M. Al-Hashimi, David Flynn,...
This paper presents an RFID based psychiatric critical to psychiatric patient treatment. The work oftracking patient tracking system in a psychiatric patient care center. In psychi...