733 search results - page 34 / 147 » High performance in tree-based parallel architectures |
ISPA
2007
Springer
14 years 1 months ago
2007
Springer
The Cell processor is a typical example of a heterogeneous multiprocessor-on-chip architecture that uses several levels of parallelism to deliver high performance. Closing the gap ...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
High-radix switches are desirable building blocks for large computer interconnection networks, because they are more suitable to convert chip I/O bandwidth into low latency and lo...
MICRO
2003
IEEE
14 years 27 days ago
2003
IEEE
Data-parallel programs are both growing in importance and increasing in diversity, resulting in specialized processors targeted at specific classes of these programs. This paper ...
DATE
2003
IEEE
14 years 28 days ago
2003
IEEE
Software implementations of channel decoding algorithms are attractive for communication systems with their large variety of existing and emerging standards due to their flexibil...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
Chip multiprocessors (CMPs) are now commonplace, and the number of cores on a CMP is likely to grow steadily. However, in order to harness the additional compute resources of a CM...