816 search results - page 8 / 164 » Interconnect design methods for memory design |
DAC
2001
ACM
14 years 8 months ago
2001
ACM
Using on-chip interconnection networks in place of ad-hoc global wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory a...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
— In today’s complex SoC designs, verification and debugging are becoming ever more crucial and increasingly timeconsuming tasks. The prevalence of embedded memories adds to t...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
As Moore’s Law continues to fuel the ability to build ever increasingly complex system-on-chips (SoCs), achieving performance goals is rising as a critical challenge to completi...
ISPASS
2009
IEEE
14 years 2 months ago
2009
IEEE
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...