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VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
14 years 8 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
ICCAD
2002
IEEE
154views Hardware» more  ICCAD 2002»
14 years 4 months ago
Concurrent flip-flop and repeater insertion for high performance integrated circuits
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
Pasquale Cocchini
DATE
2004
IEEE
144views Hardware» more  DATE 2004»
13 years 11 months ago
Smaller Two-Qubit Circuits for Quantum Communication and Computation
We show how to implement an arbitrary two-qubit unitary operation using any of several quantum gate libraries with small a priori upper bounds on gate counts. In analogy to librar...
Vivek V. Shende, Igor L. Markov, Stephen S. Bulloc...
DATE
2007
IEEE
88views Hardware» more  DATE 2007»
14 years 1 months ago
Trade-off design of analog circuits using goal attainment and "Wave Front" sequential quadratic programming
One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as hig...
Daniel Mueller, Helmut E. Graeb, Ulf Schlichtmann
ISCAS
1999
IEEE
100views Hardware» more  ISCAS 1999»
13 years 11 months ago
Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis
This paper presents the design consideration of high order digital AZ modulators used as modulus controller for fractional-N frequency synthesizer. A third-order MASH structure (M...
Lizhong Sun, Thierry Lepley, Franck Nozahic, Amaud...