1307 search results - page 112 / 262 » Low Power Hardware for a High Performance PDA |
163
Voted
ICCAD
2005
IEEE
16 years 3 months ago
2005
IEEE
Modern design requirements have brought additional complexities to netlists and layouts. Millions of components, whitespace resources, and fixed/movable blocks are just a few to ...
213
Voted
PVM
1997
Springer
15 years 10 months ago
1997
Springer
The extremely low latencies and high bandwidth results achievable with the Scalable Coherent Interface SCI at lowest level encourages its integration into existing Message Passin...
173
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VLSID
2006
IEEE
16 years 4 days ago
2006
IEEE
Low density parity check (LDPC) codes are one of the most powerful error correcting codes known. Recent research have pointed out their potential for a low cost, low latency hardw...
161
Voted
DAC
2002
ACM
16 years 7 months ago
2002
ACM
In this paper, we introduce a framework to estimate the power consumption on switch fabrics in network routers. We propose different modeling methodologies for node switches, inte...
151
Voted
DAC
2004
ACM
16 years 7 months ago
2004
ACM
Power consumption, particularly runtime leakage, in long on-chip buses has grown to an unacceptable portion of the total power budget due to heavy buffer insertion to combat RC de...