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ISLPED
2000
ACM
107views Hardware» more  ISLPED 2000»
13 years 12 months ago
Low power mixed analog-digital signal processing
The power consumption of mixed-signal systems featured by an analog front-end, a digital back-end, and with signal processing tasks that can be computed with multiplications and a...
Mattias Duppils, Christer Svensson
ISLPED
1999
ACM
129views Hardware» more  ISLPED 1999»
13 years 11 months ago
Power scalable processing using distributed arithmetic
A recent trend in low power design has been the employment of reduced precision processing methods for decreasing arithmetic activity and average power dissipation. Such designs c...
Rajeevan Amirtharajah, Thucydides Xanthopoulos, An...
PATMOS
2007
Springer
14 years 1 months ago
Switching Activity Reduction of MAC-Based FIR Filters with Correlated Input Data
In this work we consider coefficient reordering for low power realization of FIR filters on fixed-point multiply-accumulate (MAC) based architectures, such as DSP processors. Com...
Oscar Gustafsson, Saeeid Tahmasbi Oskuii, Kenny Jo...
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
13 years 11 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
ISLPED
2004
ACM
124views Hardware» more  ISLPED 2004»
14 years 28 days ago
The design of a low power asynchronous multiplier
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of low po...
Yijun Liu, Stephen B. Furber